The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2006
Filed:
Mar. 13, 2002
Stephen L. James, Boise, ID (US);
Chad A. Cobbley, Boise, ID (US);
Stephen L. James, Boise, ID (US);
Chad A. Cobbley, Boise, ID (US);
Micron Technology, Inc., Boise, IA (US);
Abstract
Packaged microelectronic devices, interconnecting units for packaged microelectronic devices, and methods and apparatuses for packaging microelectronic devices with pressure release elements. In one aspect of the invention, a packaged microelectronic device includes a microelectronic die, an interconnecting unit coupled to the die, and a protective casing over the die. The interconnecting unit can have a substrate with a first side and a second side to which the die is attached, a plurality of contact elements operatively coupled to corresponding bond-pads on the die, and a plurality of ball-pads on the first side of the substrate electrically coupled to the contact elements. The protective casing can have at least a first cover encapsulating the die on the first side of the substrate. The packaged microelectronic device can also include a pressure relief element through at least a portion of the first cover and/or the substrate. The pressure relief element can have an opening to an external environment and a passageway to an internal location within the packaged microelectronic device. In operation, the pressure relief element releases gases or other forms of moisture entrapped by the casing and/or the substrate during high temperature processing of the packaged microelectronic device.