The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Feb. 05, 2003
Applicants:

Suneeta Sah, Portland, OR (US);

Stanley S. Kulick, Portland, OR (US);

Varin Udompanyanan, Hillsboro, OR (US);

Chitra Natarajan, Flushing, NY (US);

Hrishikesh S. Pai, Hillsboro, OR (US);

Inventors:

Suneeta Sah, Portland, OR (US);

Stanley S. Kulick, Portland, OR (US);

Varin Udompanyanan, Hillsboro, OR (US);

Chitra Natarajan, Flushing, NY (US);

Hrishikesh S. Pai, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Memory bandwidth may be enhanced by reordering read and write requests to memory. A read queue can hold multiple read requests and a write queue can hold multiple write requests. By examining the contents of the queues, the order in which the read and write requests are presented to memory may be changed to avoid or minimize page replace conflicts, DIMM turn around conflicts, and other types of conflicts that could otherwise impair the efficiency of memory operations.


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