The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Aug. 04, 2003
Applicants:

Robert O. Conn, Los Gatos, CA (US);

Kameswara K. Rao, San Jose, CA (US);

Inventors:

Robert O. Conn, Los Gatos, CA (US);

Kameswara K. Rao, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/62 (2006.01); H03K 17/693 (2006.01);
U.S. Cl.
CPC ...
Abstract

A series capacitor coupling (SCC) structure is controllable to capacitively couple a data input lead of the SCC structure to an output lead of the SCC, or to de-couple the data input lead from the data output lead. An SCC is controlled by a control bit stored in an associated memory cell. A multiplexer is fashioned out of a plurality of such SCC structures such that the edges of a digital signal received on a selected one of a plurality of multiplexer data input leads is coupled through the SCC structures onto an intervening node. The edges of the digital signal on the intervening node are then latched to recreate the incoming digital signal and the latched signal is output onto a multiplexer data output lead. The multiplexer is very fast and has a low leakage current in comparison to conventional transmission gate multiplexers used in programmable logic devices.


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