The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Mar. 11, 2004
Applicants:

Junichi Hikita, Kyoto, JP;

Goro Nakatani, Kyoto, JP;

Nobuhisa Kumamoto, Kyoto, JP;

Katsumi Sameshima, Kyoto, JP;

Kazutaka Shibata, Kyoto, JP;

Shigeyuki Ueda, Kyoto, JP;

Inventors:

Junichi Hikita, Kyoto, JP;

Goro Nakatani, Kyoto, JP;

Nobuhisa Kumamoto, Kyoto, JP;

Katsumi Sameshima, Kyoto, JP;

Kazutaka Shibata, Kyoto, JP;

Shigeyuki Ueda, Kyoto, JP;

Assignee:

Rohm Co., LTD, Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.


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