The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2006
Filed:
Feb. 13, 2004
Hee-sook Park, Seoul, KR;
Gil-heyun Choi, Gyeonggi-do, KR;
Sang-bom Kang, Seoul, KR;
Kwang-jin Moon, Gyeonggi-do, KR;
Hyun-su Kim, Gyeonggi-do, KR;
Seung-gil Yang, Gyeonggi-do, KR;
Hee-Sook Park, Seoul, KR;
Gil-Heyun Choi, Gyeonggi-do, KR;
Sang-Bom Kang, Seoul, KR;
Kwang-Jin Moon, Gyeonggi-do, KR;
Hyun-Su Kim, Gyeonggi-do, KR;
Seung-Gil Yang, Gyeonggi-do, KR;
Abstract
An integrated circuit device, e.g., a memory device, includes a substrate, a first insulation layer on the substrate, and a contact pad disposed in the first insulation layer in direct contact with the substrate. A second insulation layer is disposed on the first insulation layer. A conductive pattern, e.g., a damascene bit line, is disposed in the second insulation layer. A conductive plug extends through the second insulation layer to contact the contact pad and is self-aligned to the conductive pattern. An insulation film may separate the conductive pattern and the conductive plug. A glue layer may be disposed between the conductive pattern and the second insulation layer. The device may further include a third insulation layer on the second insulation layer and the conductive pattern, and the conductive plug may extend through the second and third insulation layers.