The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2006

Filed:

Oct. 24, 2002
Applicants:

Yasushi Nakagiri, Kyotanabe, JP;

Takeshi Suzuki, Izumi, JP;

Fumio Echigo, Osaka, JP;

Inventors:

Yasushi Nakagiri, Kyotanabe, JP;

Takeshi Suzuki, Izumi, JP;

Fumio Echigo, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 15/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a prepreg and a circuit board that can achieve, e.g., low interstitial via connection resistance, excellent connection stability, and high durability, regardless of materials, physical properties, and a combination of the materials of an insulating layer. The present invention also provides a method for manufacturing the prepreg and the circuit board. The prepreg of the present invention includes a laminate including at least one first layer and at least one second layer. The first layer is an insulating layer that includes a resin. The second layer has pores that connect an upper and a lower surface of the second layer, and the upper and the lower surface of the second layer differ from each other in at least one selected from open are ratio and average pore diameter. Using this prepreg makes it possible to provide a circuit board that is characterized, e.g., by low interstitial via connection resistance, excellent connection stability, and high durability.


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