The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2006
Filed:
Sep. 06, 2002
Applicants:
Ravi P. Singh, Austin, TX (US);
Thomas Tomazin, Austin, TX (US);
Charles P. Roth, Austin, TX (US);
Jose Fridman, Swampscott, MA (US);
Michael Allen, Austin, TX (US);
Inventors:
Ravi P. Singh, Austin, TX (US);
Thomas Tomazin, Austin, TX (US);
Charles P. Roth, Austin, TX (US);
Jose Fridman, Swampscott, MA (US);
Michael Allen, Austin, TX (US);
Assignees:
Intel Corporation, Santa Clara, CA (US);
Analog Devices, Inc., Norwood, MA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/24 (2006.01);
U.S. Cl.
CPC ...
Abstract
A processor may support a self-nesting mode in which an interrupt may preempt another interrupt of the same priority level. The execution of an interrupt service routine (ISR) for an interrupt may be deferred until the ISR for a subsequently received interrupt of the same priority level is completed.