The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2006

Filed:

Oct. 30, 2001
Applicant:

Frederic Reblewski, Paris, FR;

Inventor:

Frederic Reblewski, Paris, FR;

Assignee:

Mentor Graphics Corporation, Wilsonville, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01);
U.S. Cl.
CPC ...
Abstract

Data processing resources are distributively provided to an emulation system to locally and correspondingly generate configuration signals to configure selected ones of reconfigurable logic and interconnect resources of corresponding collections of reconfigurable logic and interconnect resources, to emulate corresponding partitions of an IC design. In one embodiment, the distributed data processing resources further locally and correspondingly determine inteconnect routing within the selected ones of the reconfigurable logic resources of the corresponding collections of reconfigurable logic resources. In one embodiment, the distributed data processing resources are disposed on logic boards having emulation ICs that include the reconfigurable logic and interconnect resources. In other embodiments, at least some of the distributed data processing resources are disposed on the emulation ICs. The board and IC disposed distribtued data processing resources cooperatively perform the earlier mentioned distributed and corresponding generation of configruation signals and interconnect routing determination.


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