The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2006

Filed:

May. 25, 2001
Applicants:

Jeffrey A. Kleck, Hillsboro, OR (US);

Dan H. Wolaver, Westbrookfield, MA (US);

Daniel G. Knierim, Beaverton, OR (US);

Inventors:

Jeffrey A. Kleck, Hillsboro, OR (US);

Dan H. Wolaver, Westbrookfield, MA (US);

Daniel G. Knierim, Beaverton, OR (US);

Assignee:

Tektronix, Inc., Beaverton, OR (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 17/00 (2006.01); H04B 3/46 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A jitter measurement method using a down-mixing or down-converting topology in a jitter measurement system preserves the jitter UI rather than the jitter seconds. An input serial data stream at a high baud is mixed with a stable local oscillator frequency that is close to that of the high baud. The difference between the high baud and the local oscillator frequency is passed by a filter as a lower rate serial stream. A clock recovery circuit recovers a lower rate clock from the lower rate serial stream, or an amplitude modulation removal stage converts the lower rate serial stream to a lower rate NRZ signal, or the lower rate serial signal is digitized. Jitter measurement is performed by a jitter measurement stage on the lower rate clock, the lower rate NRZ signal, or the digitized lower rate serial signal.


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