The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2006

Filed:

Mar. 18, 2004
Applicants:

Yoichiro Tarui, Tokyo, JP;

Ken-ichi Ohtsuka, Tokyo, JP;

Masayuki Imaizumi, Tokyo, JP;

Hiroshi Sugimoto, Tokyo, JP;

Tetsuya Takami, Tokyo, JP;

Inventors:

Yoichiro Tarui, Tokyo, JP;

Ken-ichi Ohtsuka, Tokyo, JP;

Masayuki Imaizumi, Tokyo, JP;

Hiroshi Sugimoto, Tokyo, JP;

Tetsuya Takami, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/336 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device and its manufacturing method in which the trade-off relationship between channel resistance and JFET resistance is improved. The same mask is used to form a source region and a base region by ion implantation. In a vertical MOSFET including SiC, a source region and a base region are formed by ion implantation using the same tapered mask to give the base region a tapered shape. The taper angle of the tapered mask is set to 30° to 60° when the material of the tapered mask has the same range as SiC in ion implantation, and to 20° to 45° when the material of the tapered mask is SiO.


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