The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2006

Filed:

Mar. 05, 2004
Applicants:

Douglas C. Morse, Hillsboro, OR (US);

Edward E. Miller, Beaverton, OR (US);

Edward A. Ramsden, Hillsboro, OR (US);

Inventors:

Douglas C. Morse, Hillsboro, OR (US);

Edward E. Miller, Beaverton, OR (US);

Edward A. Ramsden, Hillsboro, OR (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/30 (2006.01); H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus is provided to power-up a device having both digital and analog circuitry. The analog circuitry requires a stabilization period before proper operation. During power-up, the digital circuitry is held in reset by a power-on reset circuit. The power-on reset circuit releases the reset after the expiration of a power-on reset period. During the period of time after expiration of the power-on reset period and before the analog circuitry reaches equilibrium, the digital circuitry operates in a mode that does not require input signals from the analog circuitry. After the analog circuitry has reached equilibrium, the digital circuitry begins normal operation during which inputs signals from the analog circuitry may be processed by the digital circuitry.


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