The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7026667 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 11, 2006

Filed:

Aug. 23, 2002
Applicant:

Niichi Itoh, Hyogo, JP;

Inventor:

Niichi Itoh, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock signal transmission line in the semiconductor integrated circuit device includes a plurality of straight portions arranged side by side in a predetermined direction and a plurality of bent portions connecting the respective straight portions. At least two of a plurality of signal lines to which a clock signal is transmitted are connected to different straight portions. Consequently, a semiconductor integrated circuit device which can reduce a clock skew when transmitting a clock signal to a plurality of signal lines is provided.


Find Patent Forward Citations

Itoh, Niichi. (2006). Semiconductor integrated circuit device having clock signal transmission line and wiring method thereof (U.S. Patent No. 7026667). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7026667

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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