The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2006

Filed:

Feb. 11, 2004
Applicants:

Jae-hyun Kim, Incheon, KR;

Dong-won Shin, Seongnam-si, KR;

Boo-deuk Kim, Suwon-si, KR;

Chang-ho Lee, Suwon-si, KR;

Won-mi Kim, Yongin-si, KR;

Seok-bong Park, Yongin-si, KR;

Inventors:

Jae-Hyun Kim, Incheon, KR;

Dong-Won Shin, Seongnam-si, KR;

Boo-Deuk Kim, Suwon-si, KR;

Chang-Ho Lee, Suwon-si, KR;

Won-Mi Kim, Yongin-si, KR;

Seok-Bong Park, Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a semiconductor device fabrication method and in a product formed according to the method, a photosensitive polyimide layer (PSPL) layer is applied to a semiconductor device in a manner which overcomes the limitations of the conventional approaches. The beneficial qualities of an added photoresist layer are utilized to avoid unwanted development of the underlying PSPL layer. In this manner, cracking of the PSPL layer is mitigated or eliminated, reducing the device soft error rate (SER) and increasing device yield. This is accomplished in a reliable and low-cost approach that employs standard device fabrication techniques.


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