The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 2006
Filed:
Oct. 29, 2003
Applicants:
Arvind Kamath, Mountain View, CA (US);
Venkatesh P. Gopinath, Fremont, CA (US);
Wen-chin Yeh, Fremont, CA (US);
David Pachura, Santa Clara, CA (US);
Inventors:
Arvind Kamath, Mountain View, CA (US);
Venkatesh P. Gopinath, Fremont, CA (US);
Wen-Chin Yeh, Fremont, CA (US);
David Pachura, Santa Clara, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method of producing an antifuse includes introducing nitrogen by ion implantation means into the substrate. An oxide dielectric layer is then formed on the nitrided substrate in a wet oxidation ambient. The conditions of the ion implantation and the oxidation are controlled to generate a dielectric with uniform thickness and a low breakdown voltage when subjected to a high electric field.