The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 04, 2006
Filed:
May. 08, 2003
Eddy Pramono, Santa Clara, CA (US);
Eddy Pramono, Santa Clara, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Diffusion effects during an IC fabrication process cause actual dimensions of adjacent conductors in an IC to vary from nominal dimensions specified by data defining the IC layout. A computer-aided design tool processes the layout data to generate a separate database for each layer of the IC, including a separate table corresponding to each grid line of that layer. Each table includes a separate table entry corresponding to each conductor to reside along the table's corresponding grid line, each table entry indicating nominal dimensions and position of its corresponding conductor. The tool sorts grid line tables within each layer's database in an order in which their corresponding grid lines are arranged on that layer, and sorts entries in each table in an order in which their corresponding conductors are to appear along the table's corresponding grid line. The tool then reads each entry in each table of each database only once, in the orders in which the entries and tables are sorted, to obtain information it needs to estimate actual dimensions of each conductor, and estimates the resistance of each conductor as a function of its estimated actual dimensions.