The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2006

Filed:

Dec. 20, 2002
Applicants:

Mikio Negishi, Komoro, JP;

Hiroki Noto, Komoro, JP;

Tomio Yamada, Tamamura, JP;

Tsuneo Endoh, Komoro, JP;

Inventors:

Mikio Negishi, Komoro, JP;

Hiroki Noto, Komoro, JP;

Tomio Yamada, Tamamura, JP;

Tsuneo Endoh, Komoro, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/02 (2006.01); H05K 7/06 (2006.01); H05K 7/08 (2006.01); H05K 7/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device capable of attaining the reduction of size is disclosed. The semiconductor device comprises a module substrate having a surface and a back surface, a control chip mounted on the surface of the module substrate, plural chip parts mounted on the surface in adjacency to the control chip, first and second output chips mounted on the back surface of the module substrate, plural lands formed on the back surface of the module substrate, and a seal portion formed of resin to seal the control chip and the plural chip parts, wherein the first and second output chips are larger in the amount of heat generated than the control chip, the heat from the first and second output ships is radiated to a mother board, and packaging parts on the surface side of the module substrate are sealed with only a sealing resin without using a metallic case or the like to attain the reduction in size of the module.


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