The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2006
Filed:
Oct. 19, 2004
Hung-eil Kim, San Jose, CA (US);
Anna Minvielle, San Jose, CA (US);
Christopher F. Lyons, Fremont, CA (US);
Marina V. Plat, San Jose, CA (US);
Ramkumar Subramanian, Sunnyvale, CA (US);
Hung-eil Kim, San Jose, CA (US);
Anna Minvielle, San Jose, CA (US);
Christopher F. Lyons, Fremont, CA (US);
Marina V. Plat, San Jose, CA (US);
Ramkumar Subramanian, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A method of forming a contact in a flash memory device is disclosed. The method increases the depth of focus margin and the overlay margin between the contact and the stacked gate layers. A plurality of stacked gate layers are formed on a semiconductor substrate, wherein each stacked gate layer extends in a predefined direction and is substantially parallel to other stacked gate layers. An interlayer insulating layer is deposited over the plurality of stacked gate layers, and a contact hole is patterned between a first stacked gate layer of the plurality of stacked gate layers and a second stacked gate layer of the plurality of stacked gate layers. The contact hole is formed in an elongated shape, wherein a major axis of the contact hole is substantially parallel to the stacked gate layers. A conductive layer is deposited in the contact hole and excess conductive material is removed.