The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7012837 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 14, 2006

Filed:

Jul. 31, 2004
Applicants:

David Naura, Aix en Provence, FR;

Bertrand Bertrand, Trets, FR;

Mohamad Chehadi, Aix en Provence, FR;

Inventors:

David Naura, Aix en Provence, FR;

Bertrand Bertrand, Trets, FR;

Mohamad Chehadi, Aix en Provence, FR;

Assignee:

STMicroelectronics, S.A., Montrouge, FR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method is provided for erasing or programming at least one memory cell of a non-volatile memory. According to the method, a state fixation pulse is applied to a floating gate transistor of the memory cell. The state fixation pulse also includes, successively, a portion at a reference voltage, and a state fixation portion at a voltage with sufficient amplitude for the transfer of electrons between the drain and the gate of the floating gate transistor. Additionally, an external adjustment signal is applied to the memory to adjust the state fixation portion to a predetermined duration, and the state fixation portion is adjusted to the predetermined duration in real time as a function of the state of the adjustment signal. Also provided is a non-volatile memory.


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