The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2006
Filed:
Dec. 15, 2004
Keiichi Higeta, Hamura, JP;
Satoshi Iwahashi, Ome, JP;
Yoichiro Aihara, Ome, JP;
Shigeru Nakahara, Musashimurayama, JP;
Keiichi Higeta, Hamura, JP;
Satoshi Iwahashi, Ome, JP;
Yoichiro Aihara, Ome, JP;
Shigeru Nakahara, Musashimurayama, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
Data lines (D, D) are shared by a first storage portion (MA) and a second storage portion (MB), and furthermore, a first transistor (MC) coupled to a first comparison data portion (CD) and a second transistor (MCA) coupled to the storage node of a first storage portion are connected in series to form a first comparing circuit (), and a third transistor (MC) coupled to a second comparison data line (CD) and a fourth transistor (MCB) coupled to the storage node of the second storage portion are connected in series to form a second comparing circuit (). Consequently, it is possible to enhance a symmetry in the layout of a diffusion layer and a wiring layer and to achieve the easiness of a layout in which a memory cell is line symmetrical with respect to a center line passing through a center thereof. Thus, a manufacturing process condition can easily be optimized and a variation in a manufacturing process can be reduced so that the microfabrication of the memory cell can be achieved.