The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2006

Filed:

Apr. 18, 2001
Applicants:

Ram Voorakaranam, Smyrna, GA (US);

Abhijit Chatterjee, Marietta, GA (US);

Pramodchandran N. Variyam, Plano, TX (US);

Sasikumar Cherubal, Atlanta, GA (US);

Alfred V. Gomes, Sunnyvale, CA (US);

Inventors:

Ram Voorakaranam, Smyrna, GA (US);

Abhijit Chatterjee, Marietta, GA (US);

Pramodchandran N. Variyam, Plano, TX (US);

Sasikumar Cherubal, Atlanta, GA (US);

Alfred V. Gomes, Sunnyvale, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/263 (2006.01);
U.S. Cl.
CPC ...
Abstract

A low cost signature test for RF and analog circuits. A model is provided to predict one or more performance parameters characterizing a first electronic circuit produced by a manufacturing process subject to process variation from the output of one or more second electronic circuits produced by the same process in response to a selected test stimulus, and iteratively varying the test stimulus to minimize the error between the predicted performance parameters and corresponding measured values for the performance parameters, for determining an optimized test stimulus. A non-linear model is preferably constructed for relating signature test results employing the optimized test stimulus in manufacturing testing to circuit performance parameters.


Find Patent Forward Citations

Loading…