The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2006
Filed:
Mar. 19, 2003
Ralf Henninger, München, DE;
Franz Hirler, Isen, DE;
Joachim Krumrey, München, DE;
Walter Rieger, Arnoldstein, AT;
Martin Pölzl, Ossiach, AT;
Heimo Hofer, Fuernitz, AT;
Ralf Henninger, München, DE;
Franz Hirler, Isen, DE;
Joachim Krumrey, München, DE;
Walter Rieger, Arnoldstein, AT;
Martin Pölzl, Ossiach, AT;
Heimo Hofer, Fuernitz, AT;
Infineon Technologies AG, Munich, DE;
Abstract
A method for fabricating a transistor configuration including at least one trench transistor cell has a gate electrode and a field electrode disposed in a trench below the gate electrode. The trenches are formed in a semiconductor substrate. A drift zone, a channel zone, and a source zone are in each case provided in the semiconductor substrate. According to the invention, the source zone and/or the channel zone are formed at the earliest after the introduction of the trenches into the semiconductor substrate by implantation and diffusion.