The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2006

Filed:

Mar. 31, 2003
Applicants:

Masaharu Kubo, Hachioji, JP;

Mitsuru Hiraki, Kodaira, JP;

Hiroyuki Mizuno, Kokubunji, JP;

Syuji Ikeda, Koganei, JP;

Inventors:

Masaharu Kubo, Hachioji, JP;

Mitsuru Hiraki, Kodaira, JP;

Hiroyuki Mizuno, Kokubunji, JP;

Syuji Ikeda, Koganei, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a MOS circuit comprising a plurality of MOSFETs constituting a digital circuit, an input signal is supplied to the digital circuit, and a first back bias voltage is supplied to a semiconductor substrate or a semiconductor well region in which the MOSFETs are formed, so that a pn junction between the semiconductor substrate or the semiconductor well region and a source region is brought to a forward voltage. In a non-operating state in which a circuit operation is suspended by the input signal supplied to the digital circuit as a fixed level, a second back bias voltage is applied to the semiconductor substrate or the semiconductor well region so that the pn junction between the semiconductor substrate or the semiconductor well region and the source region is brought to a reverse voltage.


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