The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2006

Filed:

Sep. 28, 2004
Applicant:

Xingbi Chen, Chengdu, CN;

Inventor:

Xingbi Chen, Chengdu, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
Abstract

Lateral high-side and low-side high-voltage devices with low specific on-resistances are made in a first and in a second surface voltage-sustaining region, respectively. In the on-state of high-side MOST (the right portion of the figure), the voltage across its source and its drain is very low and only layer(p-type) is depleted to a large extent, layerand layerremain neutral and can serve as drift region(s) of electrons and/or holes. The drift region can be used for a single n-MOST or p-MOST, or even a parallel connection of n-MOST and p-MOST as shown in the figure. In the off-state of the high-side MOST, the voltage across its source and its drain is very large, but the voltage across its drain and the substratecan be very low, and all of the layers in the first surface voltage-sustaining region are depleted, the depleted layerproduces an optimum variation lateral density of charge. The low-side MOST (the left portion of the figure) is similar to the high-side MOST.


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