The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 14, 2006
Filed:
Jan. 27, 2005
Gunther Kann, Griesstätt, DE;
Manfred Thurner, Ach, AT;
Karl-heinz Wajand, Ach, AT;
Armin Deser, Burghausen, DE;
Markus Schnappauf, Rosenheim, DE;
Gunther Kann, Griesstätt, DE;
Manfred Thurner, Ach, AT;
Karl-Heinz Wajand, Ach, AT;
Armin Deser, Burghausen, DE;
Markus Schnappauf, Rosenheim, DE;
Siltronic AG, Munich, DE;
Abstract
The invention relates to a process for producing a semiconductor wafer by simultaneous polishing of a front surface and a back surface of the semiconductor wafer with a polishing fluid between rotating polishing plates during a polishing run which lasts for a polishing time, the semiconductor wafer being located in a cutout in a carrier having a defined carrier thickness and being held on a defined geometric path, the semiconductor wafer having a starting thickness prior to polishing and a final thickness after polishing. The polishing time for the polishing run is calculated from data which include the starting thickness of the semiconductor wafer and the carrier thickness as well as the starting thickness and final thickness and the flatness of a semiconductor wafer which was polished during a polishing run preceding the present polishing run.