The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6995452 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 07, 2006

Filed:

Dec. 30, 2003
Applicants:

Wonju Cho, Daejeon, KR;

Seong Jae Lee, Daejeon, KR;

Jong Heon Yang, Daejeon, KR;

Jihun OH, Daejeon, KR;

Kiju Im, Daejeon, KR;

Inventors:

Wonju Cho, Daejeon, KR;

Seong Jae Lee, Daejeon, KR;

Jong Heon Yang, Daejeon, KR;

Jihun Oh, Daejeon, KR;

Kiju Im, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided are an SOI MOSFET device with a nanoscale channel that has a source/drain region including a shallow extension region and a deep junction region formed by solid-phase diffusion and a method of manufacturing the SOI MOSFET device. In the method of manufacturing the MOSFET device, the shallow extension region and the deep junction region that form the source/drain region are formed at the same time using first and second silicon oxide films doped with different impurities. The effective channel length of the device can be scaled down by adjusting the thickness and etching rate of the second silicon oxide film doped with the second impurity. The source/drain region is formed on the substrate before the formation of a gate electrode, thereby easily controlling impurity distribution in the channel. An impurity activation process of the source/drain region can be omitted, thereby preventing a change in a threshold voltage of the device. A solid-phase impurity is diffused. Therefore, no crystal defect of a substrate is caused, thereby decreasing a junction leakage current.


Find Patent Forward Citations

Cho, Wonju. (2006). Mosfet device with nanoscale channel and method of manufacturing the same (U.S. Patent No. 6995452). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6995452

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