The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2006
Filed:
Nov. 12, 2003
Ya-lun Cheng, Taipei, TW;
Chin-cheng Chien, Hsin-Chu, TW;
Neng-hui Yang, Hsin-Chu, TW;
Yu-kun Chen, Hsin-Chu, TW;
Ya-Lun Cheng, Taipei, TW;
Chin-Cheng Chien, Hsin-Chu, TW;
Neng-Hui Yang, Hsin-Chu, TW;
Yu-Kun Chen, Hsin-Chu, TW;
United Microelectronics Corp., Hsin Chu, TW;
Abstract
A method for preventing to form a spacer undercut in SEG preclean process is provided. This present invention utilizes HFEG solution to etch the first spacer and the second spacer simultaneously, which can prevent from producing a spacer undercut, meanwhile; a native oxide layer upon a surface of a semiconductor substrate is removed. Hence, the clean surface on the semiconductor substrate is obtained. This method includes the steps as follows: Firstly, the native oxide layer upon the surface of the semiconductor substrate is removed by DHF (HF in deionized water) solution. Then, etching the first spacer and the second spacer at the same time by HFEG (HF diluted by ethylene glycol) solution. Also, the native oxide upon the semiconductor substrate is removed. Therefore, it obtains the clean semiconductor surface without a serious spacer undercut.