The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 17, 2006
Filed:
May. 24, 2004
Ho Lee, Gwangju-gun, KR;
Moon-han Park, Yongin, KR;
Hwa-sung Rhee, Seongnam, KR;
Jae-yoon Yoo, Seoul, KR;
Seung-hwan Lee, Seoul, KR;
Ho Lee, Gwangju-gun, KR;
Moon-Han Park, Yongin, KR;
Hwa-Sung Rhee, Seongnam, KR;
Jae-Yoon Yoo, Seoul, KR;
Seung-Hwan Lee, Seoul, KR;
Samsung Electronic Co., Ltd., Suwon-si, KR;
Abstract
A multi-layered structure of a semiconductor device includes a substrate, and a heteroepitaxial layer having a low dislocation defect density on the substrate. The heteroepitaxial layer consists of a main epitaxial layer and at least one intermediate epitaxial layer sandwished in the main epitaxial layer. At their interface, the heteroepitaxial layer, i.e., the bottom portion of the main epitaxial layer, and the substrate have different lattice constants. Also, the intermediate epitaxial layer has a different lattice constant from that of the portions of the main epitaxial layer contiguous to the intermediate epitaxial layer. The intermediate epitaxial layer also has a thickness smaller than the net thickness of the main epitaxial layer such that the intermediate epitaxial layer absorbs the strain in the heteroepitaxial layer. Thus, it is possible to obtain a multi-layered structure comprising an epitaxial layer that is relatively thin and has a low dislocation defect density.