The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2006
Filed:
Aug. 27, 2004
Applicant:
Danial S. Dean, Meridian, ID (US);
Inventor:
Danial S. Dean, Meridian, ID (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A margin test on a Dynamic Random Access Memory (DRAM) in accordance with the invention begins with a supply voltage level being stored in all memory cells of the DRAM. Circuitry incorporated into each sense amplifier of the DRAM then isolates the digit line equilibrating circuitry in each sense amplifier from the cell plate voltage DVCor supply voltage Vto which the equilibrating circuitry is normally connected and connects the equilibrating circuitry to ground instead.
Dean, Danial. (2006). Device for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines (U.S. Patent No. 6985393). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6985393
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile