The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2006

Filed:

Aug. 18, 2004
Applicants:

James Chow, Palo Alto, CA (US);

Kenny Wen, San Jose, CA (US);

Inventors:

James Chow, Palo Alto, CA (US);

Kenny Wen, San Jose, CA (US);

Assignee:

STMicroelectronics, Inc., Carrollton, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A closed loop delay line system () includes a phase lock loop that provides a phase lock output signal (). A delay line () includes a clock input, a delay line output, and a delay line bias input. A bias signal provided to the delay line bias input () adjusts the speed of the delay line (). A phase detector () compares phase between a first timing signal input () and the delay line output (). A bias adjust circuit () mixes the phase compare output signal () and the phase lock output signal () to provide a combination bias signal () to the delay line (). Additionally, the relative timing position of strobe outputs () from the delay line () can be individually adjusted.


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