The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2006

Filed:

Dec. 31, 2003
Applicants:

Junji Noguchi, Tokyo, JP;

Toshinori Imai, Ome, JP;

Tsuyoshi Fujiwara, Hamura, JP;

Inventors:

Junji Noguchi, Tokyo, JP;

Toshinori Imai, Ome, JP;

Tsuyoshi Fujiwara, Hamura, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is a method of manufacturing a semiconductor device which has reliable buried interconnects (wirings) and a reliable MIM capacitor. An interconnect and a capacitor bottom electrode are formed inside a hole made in six insulation films. Then a barrier insulation film is formed on the uppermost film (of the above six insulation films) including the interconnect and the top face of the bottom electrode. After two insulation films are formed above the barrier insulation film, a hole is made in the two insulation films and a capacitor top electrode is buried in that hole. The barrier insulation film also functions as a capacity insulation film for the capacitor. Then, after three other insulation films are formed on the upper film (of the above two insulation films) including the top face of the top electrode, a hole is made in the barrier insulation film, the two insulation films, and the three other insulation films, and another interconnect is buried in that hole.


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