The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2005
Filed:
May. 14, 2003
Azeez J. Bhavnagarwala, Newtown, CT (US);
Suhwan Kim, Nanuet, NY (US);
Daniel R. Knebel, Mahopac, NY (US);
Stephen V. Kosonocky, Wilton, CT (US);
Azeez J. Bhavnagarwala, Newtown, CT (US);
Suhwan Kim, Nanuet, NY (US);
Daniel R. Knebel, Mahopac, NY (US);
Stephen V. Kosonocky, Wilton, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A power gate structure and corresponding method are provided for controlling the ground connection of a logic circuit for a plurality of modes, where the power gate structure includes an NFET transistor, a PFET transistor in signal communication with the NFET transistor, source to source and drain to drain, respectively, a ground node in signal communication with the drains of the transistors, and a ground rail in signal communication with the sources of the transistors; and the corresponding method includes decoupling the logic circuit from the ground connection in a first or active mode, holding the logic circuit at about a threshold voltage above the ground connection in a second or state retention mode, and cutting off the current flow between the logic circuit and the ground connection in a third or non-state retentive mode.