The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2005

Filed:

May. 21, 2003
Applicants:

Kazuhiko Yoshida, Nagano, JP;

Takeshi Ichimura, Nagano, JP;

Tatsuhiko Fujihira, Nagano, JP;

Naoki Kumagai, Nagano, JP;

Inventors:

Kazuhiko Yoshida, Nagano, JP;

Takeshi Ichimura, Nagano, JP;

Tatsuhiko Fujihira, Nagano, JP;

Naoki Kumagai, Nagano, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L029/00 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor device realizes a high electrostatic discharge withstanding capability and a high surge withstanding capability within the narrow chip area of a lateral MOSFET used in integrated intelligent switching devices, double-integration-type signal input and transfer IC's, and combined power IC's. The semiconductor device includes a vertical bipolar transistor in which a base is electrically connected to an emitter and a collector, and a lateral MOSFET including a drain electrode connected to a surface electrode. The vertical bipolar transistor absorbs electrostatic discharge or surge energy when a high electrostatic discharge voltage or a high surge voltage is applied and limits the electrostatic discharge voltage or the surge voltage to be lower than the breakdown voltage of the lateral MOSFET.


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