The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2005
Filed:
Feb. 14, 2003
Hisashi Ogawa, Katano, JP;
Isao Miyanaga, Nara, JP;
Koji Eriguchi, Ritto, JP;
Takayuki Yamada, Yao, JP;
Kazuichiro Itonaga, Oume, JP;
Yoshihiro Mori, Neyagawa, JP;
Hisashi Ogawa, Katano, JP;
Isao Miyanaga, Nara, JP;
Koji Eriguchi, Ritto, JP;
Takayuki Yamada, Yao, JP;
Kazuichiro Itonaga, Oume, JP;
Yoshihiro Mori, Neyagawa, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A memory cell transistor and a trench capacitor are provided in a memory region, and both transistors of CMOS are provided in a logic circuit region. There are provided a bit line contactand a bit lineextending on an inter-level dielectric. In a memory cell transistor, a source diffusion layeris covered with two dielectric sidewallsandin the memory cell transistor so that no silicide layer is formed on the source diffusion layer. A plate contactis provided to pass through the inter-level dielectricand connect a shield lineto a plate electrode. The shield lineis arranged in the same interconnect layer as the bit line