The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2005

Filed:

Oct. 20, 2003
Applicant:

Takahiro Yashita, Tokyo, JP;

Inventor:

Takahiro Yashita, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L029/78 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes an N channel MOS transistor. The N channel MOS transistor includes a first P type buried layer that isolates an N epitaxial region on a P type substrate (P-SUB) from another N epitaxial region, a drain in an N well in the N epitaxial region, a source in a P well surrounding sides of the N well to isolate the N well, and a gate on upper layer portions of the drain and the source. The MOS transistor also includes a second P type buried layer between the N well and the P well and the substrate and contiguous to the P well, and an N buried layer contiguous to the P type buried layer and the P-SUB. The N epitaxial region, the P-SUB, and the first P type buried layer are connected to ground potential.


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