The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2005
Filed:
May. 07, 2004
Min-san Huang, Hsinchu, TW;
Pin-yao Wang, Hsinchu, TW;
Min-San Huang, Hsinchu, TW;
Pin-Yao Wang, Hsinchu, TW;
Powerchip Semiconductor Corp., Hsinchu, TW;
Abstract
A method of fabricating a flash memory cell is provided. The method includes providing a substrate and forming a patterned mask layer over the substrate. Using the patterned mask layer as an etching mask, the substrate is etched to form a trench. Thereafter, a first dielectric layer is formed over the substrate and then a first gate and a second gate is formed beside each sidewall of the trench. A first source/drain region is formed in the substrate at the bottom of the trench. A second dielectric layer is formed over the substrate and then a passivation layer is formed over the second dielectric layer. Afterwards, a portion of the passivation layer, the second dielectric layer and the first dielectric layer are removed. A third gate is formed in the trench and then the mask layer is removed. A third dielectric layer is formed on the substrate. Thereafter, a fourth and a fifth gate are formed beside the respective sidewall of the first gate and the second gate. A second source/drain region is formed in the substrate on each side of the fourth and the fifth gate.