The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2005
Filed:
Jul. 21, 2003
David M. Lewis, Toronto, CA;
Paul Leventis, Toronto, CA;
Andy L. Lee, San Jose, CA (US);
Brian D. Johnson, Sunnyvale, CA (US);
Richard Cliff, Los Altos, CA (US);
Srinivas T. Reddy, Fremont, CA (US);
Christopher F. Lane, San Jose, CA (US);
Cameron R. Mcclintock, Mountain View, CA (US);
Vaughn Betz, Toronto, CA;
Chris Wysocki, Toronto, CA;
Alexander R. Marquardt, Toronto, CA;
David M. Lewis, Toronto, CA;
Paul Leventis, Toronto, CA;
Andy L. Lee, San Jose, CA (US);
Brian D. Johnson, Sunnyvale, CA (US);
Richard Cliff, Los Altos, CA (US);
Srinivas T. Reddy, Fremont, CA (US);
Christopher F. Lane, San Jose, CA (US);
Cameron R. McClintock, Mountain View, CA (US);
Vaughn Betz, Toronto, CA;
Chris Wysocki, Toronto, CA;
Alexander R. Marquardt, Toronto, CA;
Altera Corporation, San Jose, CA (US);
Abstract
An embodiment of this invention pertains to a 3-sided routing architecture to interconnect function blocks, such as logic array blocks ('LABs'), within a programmable logic device ('PLD'). In the 3-sided routing architecture, inputs and outputs on a first side of a function block connect to a first channel, and inputs and outputs on a second side of the function block connect to a second channel where the second side is opposite the first side. Inputs and outputs on a third side of the function block connect to a third channel. A fourth channel associated with a fourth side of the function block, the fourth side opposite the third side, is coupled only to the first channel and the second channel. In one configuration, the inputs and outputs on each of the first side, the second side, and the third side have an equal number of inputs and outputs. In this configuration, each of the first channel, the second channel, and the third channel have the same width. In another configuration, the number of pins on one of the first side, the second side, or the third side differs from the number of pins on another one of those sides.