The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2005

Filed:

Mar. 26, 2004
Applicants:

Hongqiang LU, Lake Oswego, OR (US);

William Barth, Gresham, OR (US);

Peter A. Burke, Portland, OR (US);

Inventors:

Hongqiang Lu, Lake Oswego, OR (US);

William Barth, Gresham, OR (US);

Peter A. Burke, Portland, OR (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/336 ;
U.S. Cl.
CPC ...
Abstract

Nanotube memory cells are formed on a semiconductor substrate. Lower and upper memory cell chambers are formed by forming a first trench overlying the first and second contacts in a nitride layer, forming a second trench overlying the first and second contacts in a dielectric layer, depositing a nitride layer on the combined lower and upper chambers, and patterning the nitride layer to form an access hole to the nanotube layer and a second access hole to the second contact. A conductive layer is then deposited and patterned to form a top electrode contact and a nanotube layer contact. The conductive material closes the aperture created by the access hole.


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