The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2005
Filed:
Jul. 12, 2001
Lup San Leong, Singapore, SG;
Feng Chen, Singapore, SG;
Charles Lin, Singapore, SG;
Chartered Semiconductor Manufacturing Limited, Singapore, SG;
Abstract
In one embodiment, a semiconductor substrate () is uniformly polished using a polishing pad () that has a first polishing region (), a second polishing region (), and a third polishing region (). The semiconductor substrate () is aligned to the polishing pad (), such that the center of the semiconductor substrate () overlies the second polishing region (), and the edge of the semiconductor substrate overlies the first polishing region () and the third polishing region (). During polishing, the semiconductor substrate () is not radially oscillated over the surface of the polishing pad, and as a result a more uniform polishing rate is achieved across the semiconductor substrate (). This allows the semiconductor substrate () to be uniformly polished from center to edge, and increases die yield because die located on the semiconductor substrate () are not over polished.