The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2005
Filed:
May. 08, 2003
Applicants:
Jeffrey Scott Brown, Fort Collins, CO (US);
Craig R. Chafin, Fort Collins, CO (US);
Chang Ho Jung, Fort Collins, CO (US);
Inventors:
Jeffrey Scott Brown, Fort Collins, CO (US);
Craig R. Chafin, Fort Collins, CO (US);
Chang Ho Jung, Fort Collins, CO (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C008/00 ;
U.S. Cl.
CPC ...
Abstract
The present invention is a method and system for providing a scalable memory building block device. The memory building block device includes a plurality of separate memory arrays, decode logic for selecting only one bit from the plurality of memory arrays, and output means for providing only one bit as an output of the memory building block device, such that the memory building block device generates as its output only one bit.