The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2005

Filed:

May. 23, 2002
Applicants:

Masanori Otsuka, Tachikawa, JP;

Kazuo Yamakido, Nishitama, JP;

Etsuji Yamamoto, Tachikawa, JP;

Shinya Sano, Kodaiara, JP;

Inventors:

Masanori Otsuka, Tachikawa, JP;

Kazuo Yamakido, Nishitama, JP;

Etsuji Yamamoto, Tachikawa, JP;

Shinya Sano, Kodaiara, JP;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M001/12 ;
U.S. Cl.
CPC ...
Abstract

An AD converter which uses no buffer for receiving the input signals or uses the buffer having relaxed requirements concerning the range of input signals and the output impedance. Voltage at the connection points of a resistor ladder in which a plurality of resistor elements are connected in series, are compared with a reference voltage by a plurality of voltage comparators, a first current circuit is provided on the high potential side of the resistor ladder, a second current circuit is provided on the low potential side thereof, and analog input voltages are fed by providing an input terminal at any place of the resistor ladder except both ends thereof.


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