The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6963132 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 08, 2005

Filed:

May. 29, 2003
Applicants:

Mark C. Hakey, Fairfax, VT (US);

Steven J. Holmes, Milton, VT (US);

David V. Horak, Essex Junction, VT (US);

Harold G. Linde, Richmond, VT (US);

Edmund J. Sprogis, Underhill, VT (US);

Inventors:

Mark C. Hakey, Fairfax, VT (US);

Steven J. Holmes, Milton, VT (US);

David V. Horak, Essex Junction, VT (US);

Harold G. Linde, Richmond, VT (US);

Edmund J. Sprogis, Underhill, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L023/34 ;
U.S. Cl.
CPC ...
Abstract

The present invention provides a method of forming an integrated semiconductor device, and the device so formed. An active surface of at least two semiconductor devices, such as semiconductor chips, are temporarily mounted onto an alignment substrate. A support substrate is affixed to a back surface of the devices using a conformable bonding material, wherein the bonding material accommodates devices having different dimensions. The alignment substrate is then removed leaving the devices wherein the active surface of the devices are co-planar.


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