The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2005
Filed:
May. 14, 2004
Cheng-chih Huang, Taipei, TW;
Sheng-wei Yang, Taipei, TW;
Neng-tai Shih, Taipei, TW;
Chen-chou Huang, Taipei, TW;
Cheng-Chih Huang, Taipei, TW;
Sheng-Wei Yang, Taipei, TW;
Neng-Tai Shih, Taipei, TW;
Chen-Chou Huang, Taipei, TW;
Nanya Technology Corporation, Taoyuan, TW;
Abstract
A method for forming a self-aligned buried strap in a vertical memory cell. A semiconductor substrate with a trench is provided. A collar dielectric layer is conformally formed on the trench bottom portion, and the trench is filled with a conducting layer. The collar dielectric layer is etched below the level of the surface of the conducting layer to form a groove between the conducting layer and the trench. The groove is filled with a doped conducting layer. The dopant in the doped conducting layer is diffused to the semiconductor substrate in an ion diffusion area as a buried strap. The conducting layer and the doped conducting layer are etched below the ion diffusion area. A top trench insulating layer is formed on the bottom of the trench, wherein the top trench insulating layer is lower than the ion diffusion area.