Semiconductor integrated circuit device

Abstract

The present invention provides a dynamic RAM which can be operated at a low voltage and realizes the enhancement of a read margin and an area-saving layout. In a memory array including a plurality of memory cells having capacitors which are formed corresponding to a plurality of word lines and a plurality of bit lines, stored information of the memory cell which is read to one bit line out of the pair of bit lines is sensed by a sense amplifier in response to a reference voltage which is formed by a dummy cell connected to another bit line, a precharge voltage of high level or low level corresponding to an operational voltage by a precharge circuit is supplied to the bit lines, and the dummy cells having the same structure as the memory cells are formed at crossing points of word lines for dummy cells and bit lines arranged outside the memory array, MOSFETs which precharge an intermediate voltage between the high level voltage and the low level voltage to the capacitors are provided, and gates of the MOSFETs are connected with charge word lines for dummy cells which are extended in parallel with the word lines for dummy cells.