The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2005
Filed:
Jul. 13, 2004
Chien Chiang, Fremont, CA (US);
David B. Fraser, Danville, CA (US);
Chien Chiang, Fremont, CA (US);
David B. Fraser, Danville, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An interconnect structure for microelectronic devices indudes a plurality of patterned, spaced apart, substantially co-planar, conductive lines, a first portion of the plurality of conductive lines having a first Intralayer dielectric of a first dielectric constant therebetween, and a second portion of the plurality of conductive lines having a second intralayer dielectric of a second dielectric constant therebetween. By providing in-plane selectability of dielectric constant, in-plane decoupling capacitance, as between power supply nodes, can be increased, while in-plane parasitic capacitance between signal lines can be reduced.