The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2005
Filed:
Mar. 29, 2002
Shinji Shirakawa, Hitachi, JP;
Akira Mishima, Mito, JP;
Keiichi Mashino, Hitachinaka, JP;
Toshiyuki Innami, Mito, JP;
Shinichi Fujino, Nishiibaraki, JP;
Hiromichi Anan, Ibaraki, JP;
Yoshitaka Ochiai, Hitachi, JP;
Shinji Shirakawa, Hitachi, JP;
Akira Mishima, Mito, JP;
Keiichi Mashino, Hitachinaka, JP;
Toshiyuki Innami, Mito, JP;
Shinichi Fujino, Nishiibaraki, JP;
Hiromichi Anan, Ibaraki, JP;
Yoshitaka Ochiai, Hitachi, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
The present invention provides a semiconductor device which reduces an inductance of wiring for bridge-connecting semiconductor switches and realizes a reduction in size. Within the semiconductor device formed are two controllable bridge-connected semiconductor switchesand, an output terminal, positive/negative polarity DC terminalsand, and an insulating substratein which conductor layersandhaving a conductor section and in an inner layer for bridge-connecting the semiconductor switches to the DC terminals on a surface thereof and insulating layersandare alternately laminated. The surface and inner-layer conductor layersandwhich interpose the insulating layertherebetween are electrically connected by a conductorpassing through the insulating layerinterposed between the conductor layersand. A current path (dotted line) is so provided as to allow current flowing through a bridge circuit for mounting the two semiconductor switches on the insulating substrate to flow in opposite directions between the conductor layersandwhich interpose the insulating layertherebetween.