The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2005

Filed:

Oct. 02, 2003
Applicants:

Consuelo N. Tangpuz, Lapulapu, PH;

Romel N. Manatad, Mandaue, PH;

Margie T. Rios, Mandaue, PH;

Erwin Victor R. Cruz, Lapulapu, PH;

Inventors:

Consuelo N. Tangpuz, Lapulapu, PH;

Romel N. Manatad, Mandaue, PH;

Margie T. Rios, Mandaue, PH;

Erwin Victor R. Cruz, Lapulapu, PH;

Assignee:

Fairchild Semiconductor Corporation, South Portland, ME (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L023/495 ;
U.S. Cl.
CPC ...
Abstract

A packaging assembly for semiconductor devices and a method for making such packaging is described. The invention provides a non-Pb bump design during a new flip-chip method of packaging. The design uses special conductive materials in a stud form, rather than a solder ball containing Pb. This configuration maintains a desirable solder thickness between the die and the leadframe and forms a high standoff by restricting solder wettabilty on the leadframe side. This configuration also absorbs any stress and protects the die from cracking. The invention also provides methods for making such semiconductor packages.


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