The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2005

Filed:

Nov. 05, 2002
Applicants:

Shivananda Shetty, Sunnyvale, CA (US);

W. Eugen Hill, Moss Beach, CA (US);

Mehrdad Mahanpour, Union City, CA (US);

Inventors:

Shivananda Shetty, Sunnyvale, CA (US);

W. Eugen Hill, Moss Beach, CA (US);

Mehrdad Mahanpour, Union City, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ; G06F019/00 ; G01R031/305 ; G01R031/02 ;
U.S. Cl.
CPC ...
Abstract

A method and system for verifying an architecture of a semiconductor device is disclosed. The method and system include providing a tester, a detector and an image processing unit. The tester applies at least one voltage to at least one selected portion of the semiconductor device. The at least one voltage is sufficient for the at least one selected portion of the semiconductor device to produce a particular level of radiation. The detector detects the radiation. The image processing unit is coupled with the detector and the tester. The image processing unit captures an image from the detector. The image indicates at least one physical location of the at least one selected portion of the semiconductor device. The architecture of the memory device can be verified by comparing the at least one selected portion of the semiconductor device to the at least one physical location.


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