The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2005
Filed:
Aug. 02, 2002
Applicants:
Tsukasa Ooishi, Hyogo, JP;
Hiroaki Tanizaki, Hyogo, JP;
Inventors:
Tsukasa Ooishi, Hyogo, JP;
Hiroaki Tanizaki, Hyogo, JP;
Assignees:
Renesas Technology Corp., Tokyo, JP;
Mitsubishi Electric Engineering Company Limited, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C007/00 ; G11C008/00 ;
U.S. Cl.
CPC ...
Abstract
A write-driver/read-amplifier circuit includes a write driver, a GIO equalize circuit and a read amplifier. When a current leaks from or to global data line, a signal applied to a logic gate attains L-level. As a result, the write driver and the GIO equalize circuit stop the operations so that a semiconductor memory device can prevent occurrence of an unnecessary leak current.
Ooishi, Tsukasa. (2005). Semiconductor memory device having a plurality of signal lines for writing and reading data (U.S. Patent No. 6940767). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6940767
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile