The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 2005
Filed:
May. 05, 2004
Kazushige Hotta, Kawasaki, JP;
Hiroyuki Yaegashi, Kawasaki, JP;
Takuya Watanabe, Kawasaki, JP;
Tamotsu Wada, Hatano, JP;
Kazushige Hotta, Kawasaki, JP;
Hiroyuki Yaegashi, Kawasaki, JP;
Takuya Watanabe, Kawasaki, JP;
Tamotsu Wada, Hatano, JP;
Fujitsu Display Technologies Corporation, Kawasaki, JP;
Abstract
A polysilicon film is formed in a predetermined region on a glass substrate, and then a gate insulating film and a gate electrode, whose width is narrower than the gate insulating film, are formed thereon. Then, an interlayer insulating film and an ITO film are formed on an overall surface. Then, n-type source/drain regions having an LDD structure are formed by implanting the n-type impurity into the polysilicon film. Then, an n-type TFT forming region and a pixel-electrode forming region are covered with a resist film, and then p-type source/drain regions are formed by implanting the p-type impurity into the polysilicon film in a p-type TFT forming region. Then, the resist film is left only in the pixel-electrode forming region and the resist film is removed from other regions. A pixel electrode is formed by etching the ITO film while using the remaining resist film as a mask.