The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2005

Filed:

Sep. 29, 2003
Applicants:

Nobuhiro Oodaira, Akishima, JP;

Hiroyuki Mizuno, Musashino, JP;

Yusuke Kanno, Hachioji, JP;

Koichiro Ishibashi, Warabi, JP;

Masanao Yamaoka, Kodaira, JP;

Inventors:

Nobuhiro Oodaira, Akishima, JP;

Hiroyuki Mizuno, Musashino, JP;

Yusuke Kanno, Hachioji, JP;

Koichiro Ishibashi, Warabi, JP;

Masanao Yamaoka, Kodaira, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F017/50 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor integrated circuit that is well-balanced between increased operating speed and decreased power consumption caused by a leakage current. The gate cells of the circuit comprised of low threshold voltage MOSs are used for logic gates provided with three or more inputs, and gate cells comprised of high threshold voltage MOSs are generally used for logic gates provided with one or two inputs, sometimes on a case-by-case basis.


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